Zhishuai ZhangPhD张智帅博士

Zhishuai Zhang is currently conducting postdoctoral research at the Integrated Systems Laboratory and AI Center of ETH Zurich, Switzerland. He was a MiniMax 10x Fellowship Researcher. He received his B.E. and Ph.D. degrees from the Department of Electronic Engineering at Tsinghua University in 2021 and 2026, respectively. He has received international honors including the IEEE Solid-State Circuits Society Student Circuit Contest Award, the ISSCC Jack Kilby Outstanding Student Paper Award, and the ISSCC Student Travel Grant Award, as well as funding and honors including the National Natural Science Foundation of China Young Student Basic Research Project (Doctoral Student).

Research

LLM Evaluation & Post-Training

Agent evaluation and post-training for chip-design tasks: expert-curated benchmarks for circuit reasoning and design skills, plus post-training methods that adapt models to digital, analog, and mixed-signal circuit design tasks.

Agentic Engineering for Chip Design

Connecting LLM agents to Cadence Virtuoso through open infrastructure such as Virtuoso-Bridge, turning repetitive manual work into automated workflows.

Analog/Mixed-Signal Integrated Circuit Design

SAR ADCs, pipelined-SAR ADCs, emerging amplifiers, and related topics; architectural reconfiguration and multi-mode concurrency for programmable A/D converter arrays.

Education & Work

  1. 2026.08 –

    ETH Zürich

    Integrated Systems Laboratory & ETH AI Center

    Postdoctoral researcher

  2. 2026.06 – 2026.08

    MiniMax

    10x Team Researcher (Fellowship)

  3. 2021 – 2026

    Tsinghua University

    Department of Electronic Engineering

    Ph.D. in Engineering (direct-Ph.D. track)

    AdvisorNan Sun

    2025.08 – 2026.01

    ETH Zürich

    Visiting researcher

    AdvisorTaekwang Jang

  4. 2017 – 2021

    Tsinghua University

    Department of Electronic Engineering

    B.E. (Bachelor of Engineering)

    AdvisorNan Sun

    2018.06 – 2018.08

    The University of Hong Kong

    Visiting researcher

    AdvisorNgai Wong

Publications

  1. Long-Horizon Analog Design Bench: Benchmarking Agents on Hours-Long Analog and Mixed-Signal Circuit Design Tasks
    Zhishuai Zhang, Analog Design Bench Team
    arXiv preprint
    arXivGoogle ScholarHomepage →
  2. A 0.0035mm² 86dB-SNR 1.25MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping
    Xing Wang, Zhishuai Zhang, Yi Zhong, Nan Sun, Lu Jie
    IEEE Journal of Solid-State Circuits (JSSC) · Featured Paper
    DOIIEEEGoogle Scholar
  3. Live Demonstration: LLM-Based Agent for Interactive Multi-Process I/O Schematic and Layout Generation
    Zhishuai Zhang*, Zengchun Chen*, Xintian Li*, Shilong Liu, Aodong Zhang, Lu Jie, Nan Sun
    IEEE International Symposium on Circuits and Systems (ISCAS)
    DOIIEEEGoogle Scholar
  4. SpecMind: Automated and Interpretable Multi-Agent Diagnosis of Analog-to-Digital Converter (ADC) Failures
    Zhishuai Zhang*, Kezhuo Liu*, Aodong Zhang, Shilong Liu, Nan Sun, Lu Jie
    International Symposium of EDA (ISEDA)
  5. AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
    Zhishuai Zhang*, Xintian Li*, Shilong Liu, Aodong Zhang, Lu Jie, Nan Sun
    AAAI Conference on Artificial Intelligence (AAAI) · CCF-A
    DOIAAAIarXivGoogle Scholar
  6. A 13b 500MS/s 94dB-SFDR Resistive-Input Pipelined-SAR ADC with Linear and Efficient Current-Buffer-Based Integrating Sampler
    Xiyu He, Mingyang Gu, Yunsong Tao, Siyu Huang, Zhishuai Zhang, Yi Zhong, Nan Sun, Lu Jie
    IEEE International Solid-State Circuits Conference (ISSCC)
    DOIIEEEGoogle Scholar
  7. A Filter-Embedded Pipe-SAR ADC with Progressive Conversion and Floating Charge Transfer Amplifier
    Siyu Huang, Zhishuai Zhang, Xiyu He, Lu Jie
    IEEE Journal of Solid-State Circuits, vol. 60, no. 12, pp. 4503–4514
    DOIIEEEGoogle Scholar
  8. A Heterogeneous Programmable A/D Converter Array Achieving over 170dB FoMs for 2-500MHz BW and 81.4-58.7dB SNDR
    Zhishuai Zhang, Siyu Huang, Mingyang Gu, Xiyu He, Yunsong Tao, C. Xing, G. Long, Yi Zhong, Nan Sun, Lu Jie
    IEEE Asian Solid-State Circuits Conference (A-SSCC)
    DOIIEEEGoogle Scholar
  9. Programmable Analog-to-Digital Converter Array Supporting Architecture Restructuring and Mode Concurrency
    Zhishuai Zhang, Mingtao Zhan, Zijie Gao, Siyu Huang, Mingyang Gu, Yunsong Tao, Xiyu He, Chitian Yuan, Yi Zhong, Nan Sun, Lu Jie
    IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 72, no. 10, pp. 5351–5364 · Highlight Paper
    DOIIEEEGoogle Scholar
  10. A 0.0035mm² 86dB-SNR 1.25MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping
    Xing Wang, Zhishuai Zhang, Yi Zhong, Nan Sun, Lu Jie
    IEEE Symposium on VLSI Technology and Circuits
    DOIIEEEGoogle Scholar
  11. A Hierarchical Compilation Method for Programmable Analog-to-Digital Converter Arrays
    Zhishuai Zhang, Siyu Huang, Yi Zhong, Nan Sun, Lu Jie
    IEEE International Symposium on Circuits and Systems (ISCAS)
    DOIIEEEGoogle Scholar
  12. Live Demonstration: A Programmable A/D Converter Array with Interactive Compiler
    Zhishuai Zhang*, Chitian Yuan*, Jiantao Li, Kun Lin, Yi Zhong, Nan Sun, Lu Jie
    IEEE International Symposium on Circuits and Systems (ISCAS)
    DOIIEEEGoogle Scholar
  13. A 0.16mm² 450MHz-BW 72dB-SNDR Continuous-Time Pipeline ADC with APF+HPF and APF+FIR Hybrid Delay Alignment Techniques
    Heyang Zhao*, Yuxuan He*, Yunsong Tao, Zhishuai Zhang, Yi Zhong, Lu Jie, Nan Sun
    IEEE Custom Integrated Circuits Conference (CICC)
    DOIIEEEGoogle Scholar
  14. Super-saturated complementary carbon nanotube transistors with intrinsic gain singularities
    Guanhua Long, Yuru Wang, Tianshun Bai, Wangchang Li, Panpan Zhang, Xiaosong Deng, Xiang Cai, Meiqi Xi, Yanxia Lin, Xiaohan Cheng, Chenwei Fan, Fan Xia, Xiao Luo, Zhishuai Zhang, Xuelei Liang, Zhiyong Zhang, Nan Sun, Lian-Mao Peng, Youfan Hu
    Nature Communications, vol. 16, 3390
    DOIGoogle Scholar
  15. A 70dB-SNDR 80MHz-BW Filter-Embedded Pipe-SAR ADC Achieving 172dB FoMs with Progressive Conversion and Floating Charge-Transfer Amplifier
    Siyu Huang, Zhishuai Zhang, Xiyu He, Mingyang Gu, Yunsong Tao, Yi Zhong, Nan Sun, Lu Jie
    IEEE International Solid-State Circuits Conference (ISSCC)
    DOIIEEEGoogle Scholar
  16. An 8b 10GS/s 2-Channel Time-Interleaved Pipelined ADC with Concurrent Residue Transfer and Quantization, and Automatic Buffer Power Gating
    Yunsong Tao, Mingtao Zhan, Mingyang Gu, Xiyu He, Yuxuan He, Zhishuai Zhang, Yi Zhong, Lu Jie, Nan Sun
    IEEE International Solid-State Circuits Conference (ISSCC)
    DOIIEEEGoogle Scholar
  17. A 1GS/s 6-Core Programmable A/D Converter Array Supporting Architecture Restructuring and Multitasking
    Zhishuai Zhang, Zijie Gao, Siyu Huang, Nan Sun, Lu Jie
    IEEE Custom Integrated Circuits Conference (CICC)
    DOIIEEEGoogle Scholar

Books & Patents

Books & Teaching 4

Open Source

——

virtuoso-bridge-lite

——

Infrastructure for agentic analog & mixed-signal design

Bridge between LLM agents and Cadence Virtuoso—workflows for SKILL, layout, schematic, Maestro, and Spectre so agents can drive the design platform.

Homepage →Source →
Cadence VirtuosoSKILLSpectreAgentic Design
Python

analog-canvas

——

Schematic canvas with direct netlist compilation

A web-based schematic canvas that directly compiles circuits into netlists, with hierarchical design, structural SPICE import, deterministic SPICE/Spectre and vector exports, community publishing, and authorized Agent integration.

Homepage →Source →
Schematic EditorSPICEAgent Integration
TypeScript

analog-design-bench

——

Benchmark for agentic analog IC block-level design

An open benchmark with complete SKY130 PDK and ngspice task packages for evaluating agentic analog IC block-level design.

Homepage →Source →
BenchmarkAnalog DesignSKY130ngspice
Python

circuits-and-systems-classroom

——

Interactive classroom for analog and mixed-signal circuits and systems

Interactive lessons and reference material covering amplifiers, data converters, PLLs, noise, feedback, and signal analysis.

Homepage →Source →
Analog CircuitsMixed-SignalInteractive Learning
TypeScript

ADCToolbox

——

Toolbox for ADC modeling, spectrum analysis, and calibration

A toolbox for ADC modeling, testing, analysis, and calibration.

Source →
ADCModelingCalibration
Python

gmoverid-skill

——

Agent skill for gm/Id characterization and gm/Id-based design

Agent skill for simulating gm/Id characteristics and supporting gm/Id-based analog design.

Source →
gm/IdAgent SkillAnalog Design
Python

razavi-bench

——

Expert-curated benchmark for analog-design reasoning

An expert-curated multimodal benchmark for analog-design reasoning and LLM evaluation.

Homepage →Source →
BenchmarkAnalog DesignLLM Evaluation
Python

AMS-IO-Agent

——

LLM agent for IO ring generation in Cadence Virtuoso

AI agent that automates IO pad ring schematic/layout generation and verification in Virtuoso.

Source →
IO RingVirtuosoAgent
Python

Talks

  • Academic conference
  • University / institute
  • Company (internal)
  • Industry meeting
  1. General-Purpose AI Agents for Analog and Mixed-Signal IC Design
    School of Integrated Circuits, Tsinghua UniversityBeijingSoutheast UniversityNanjingShanghai Bright Power Semiconductor Co., Ltd.ShanghaiSeminar on Agent Evolution and Applications in the AI EraHong KongCadenceLIVE China 2026ShanghaiCollege of AI, Tsinghua UniversityBeijingState Key Laboratory of Processors, Institute of Computing Technology, Chinese Academy of SciencesBeijingVIEW Semiconductor Pte. Ltd.SingaporeSchool of Integrated Circuit Science and Engineering, Beihang UniversityBeijingXiaomi CorporationBeijingChengdu Yongzhi Technology Co., Ltd.ChengduSEE FundBeijingZhuhai UM Science & Technology Research InstituteZhuhaiHuawei HiSilicon 2026 Mixed-Signal Technology SummitShenzhenDioo Microcircuits Co., Ltd.ShanghaiSchool of Electronics and Information Technology (School of Microelectronics), Sun Yat-sen UniversityGuangzhouHengqin UM Advanced Research InstituteShenzhenMiniMaxBeijingSchool of Integrated Circuits, Peking UniversityBeijingSchool of Integrated Circuits, Tsinghua UniversityBeijingSchool of Integrated Circuits (School of Information and Electronic Engineering), Shanghai Jiao Tong UniversityShanghaiPuya SemiconductorShanghaiUNISOCShanghaiShanghai Belling Co., Ltd.ShanghaiEmpyrean TechnologyBeijingDepartment of Electronic Engineering, Tsinghua UniversityBeijingDepartment of Electronic Engineering, Tsinghua UniversityBeijingPBC School of Finance, Tsinghua UniversityBeijingSchool of Integrated Circuits, Tsinghua UniversityBeijingShanghai Awinic Technology Co., Ltd.ShanghaiHuawei HiSiliconShanghaiSilergyHangzhouNational Technology Innovation Center for EDANanjingCIMO MicroelectronicsBeijingSchool of Electronics, Peking UniversityBeijingSouthchip SemiconductorShanghaiSchool of Integrated Circuits, Tsinghua UniversityBeijing
  2. Open-Book Chip Initiative
    ZhenFundBeijing
  3. Architecturally Reconfigurable ADC Supporting Concurrent Multi-Task Operations
    Workshop on IC Advances in China (ICAC 2024)ShanghaiDepartment of Communications and Computer Engineering, School of Fundamental Science and Engineering, Waseda UniversityTokyoBeijing Research Institute, Huawei Technologies Co., Ltd.BeijingSchool of Electronic Science and Engineering, University of Electronic Science and Technology of ChinaChengduDepartment of Electrical and Computer Engineering, National University of SingaporeSingapore
  4. A High-Efficiency Heterogeneous Programmable Analog-to-Digital Converter Array
    IEEE Asian Solid-State Circuits Conference (A-SSCC 2025)Daejeon, South KoreaStudent Research Preview (SRP) Session at the IEEE International Solid-State Circuits Conference (ISSCC 2025)San Francisco
  5. Six-Core 1-GS/s Programmable ADC Array Supporting Architectural-Level Reconfiguration and Multi-Task Operation
    IEEE Custom Integrated Circuits Conference (CICC 2023)San Antonio, USAWorkshop on IC Advances in China (ICAC 2023)Shenzhen
  6. Live Demonstration: LLM-Based Agent for Interactive Multi-Process I/O Schematic and Layout Generation
    IEEE International Symposium on Circuits and Systems (ISCAS 2026)Shanghai
  7. SpecMind: Automated and Interpretable Multi-Agent Diagnosis of Analog-to-Digital Converter (ADC) Failures
    International Symposium of EDA (ISEDA 2026)Singapore
  8. AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
    AAAI Conference on Artificial Intelligence (AAAI-26)Singapore
  9. A Hierarchical Compilation Method for Programmable Analog-to-Digital Converter Arrays
    IEEE International Symposium on Circuits and Systems (ISCAS 2025)London, United Kingdom
  10. Live Demonstration: A Programmable A/D Converter Array with Interactive Compiler
    IEEE International Symposium on Circuits and Systems (ISCAS 2025)London, United Kingdom
  11. Research on a High-Performance Analog-to-Digital Converter with an Input Driver and Sampling-Noise Cancellation
    School of Electronic Science and Engineering, University of Electronic Science and Technology of ChinaChengdu

Awards & Fundings

Awards 10

Fundings 4

  • ZhenFund × Crossing Token Grant
  • National Natural Science Foundation of China Young Student Basic Research Project (Doctoral Student)2025–2026 · Principal Investigator
  • Tsinghua University Short-Term Overseas Visiting Fund for Doctoral Students2025.07–2026.01
  • MIIT–MOE Special Scholarship for High-Level IC Talent Development (Tier A)
Virtuoso BridgeAnalog CanvasChip ArenaCAS Classroom